POWER6

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The POWER6 microprocessor is IBM's follow on to the POWER5. It is part of the eCLipz project, said to have a goal of converging IBM's server hardware where practical (hence "ipz" in the acronym: iSeries, pSeries, and zSeries).^[1]

POWER6 was described at the IEEE International Solid-State Circuits Conference[1] in February 2006, and additional details were added at Microprocessor Forum in October 2006[2] and ISSCC in February 2007. It was formally announced on 21 May 2007 [3].

[edit] Description

The POWER6 has approximately 790 million transistors and is 341 mm² large fabricated on an 65 nm process. It was released on the 8th June 2007, at speeds of 3.5 GHz, 4.2 GHz and 4.7 GHz^[2], but the company has noted prototypes have reached 6 GHz.^[3] POWER6 reached first silicon in the middle of 2005^[4].

Dr Frank Soltis, an IBM chief scientist, said IBM had solved power leakage problems associated with high frequency by using a combination of 90 nm and 65 nm parts in the POWER6 design.^[5]

The processor is a dual core design and has 128 KiB of L1 cache (64 KiB data + 64 KiB instruction), an eight-way set-associative design with a two-stage pipeline supporting two independent 32-bit reads or one 64-bit write per cycle.^[6] Each core will have a 4 MiB "semi shared" L2 cache, where the cache is assigned a specific core, but the other has a fast access to it. The two cores share a 32 MiB large L3 cache which is off die, using an 80 GB/s bus.^[7]

Each core has two integer units, two binary floating-point units, and a decimal floating-point unit, and is capable of two way SMT. The binary floating-point unit incorporates “many microarchitectures, logic, circuit, latch and integration techniques to achieve [a] 6-cycle, 13-FO4 pipeline,” according to a company paper.^[6] Unlike the servers from IBM's competitors, the POWER6 has hardware support for decimal arithmetic and will include the first decimal floating-point unit integrated in silicon. More than 50 new floating point instructions handle the decimal math and conversions between binary and decimal.^[7] This is a feature being added to the processors powering IBM's System z.^[8]

There is an AltiVec unit to POWER6, and the processor is fully compliant with the new Power ISA v.2.03 specification. POWER6 also takes advantage of ViVA-2, Virtual Vector Architecture, which enables the combination of several POWER6 nodes to act as a single Vector processor.^[8]

A notable difference from POWER5 is that IBM moved from an out-of-order design to an in-order design, a drastic change which should require software recompilation for top performance. However, the processor still achieves significant performance improvements even with unmodified software, according to the lead engineer on the POWER6 project.^[2]

IBM also makes use of a 5 GHz duty-cycle correction clock distribution network for the processor. In the network, the company implements a copper distribution wire that is 3 µm wide and 1.2 µm thick. The POWER6 design uses dual power supplies, a logic supply in the 0.8-to-1.2 Volt range and an SRAM power supply at about 150-mV higher.^[6]. The thermal characteristics of POWER6 are similar to that of the POWER5.

POWER6 can connect to up to 31 other processors using two inter node links (50 GB/s), and supports up to 1024 virtual partitions.^[7] POWER6 comes in MCMs just like POWER5 with up to four processor dies and associated external L3 cache on a single substrate. There is an interface to a service processor that monitors and adjusts performance and power according to set parameters.^[9]

[edit] Products

The POWER6 powers the IBM System i 570 and System p 570 (the two are quite similar) which can be configured up to 16 cores and three speeds, 3.5, 4.2 and 4.7 GHz. The System i/p 570 can run AIX versions 5.3L and 6 as well as Linux and i5/OS.

In November 2007, IBM revealed the POWER6 powered single-wide JS22 blade module.[4] It incorporates two POWER6 processors at 4 GHz and up to 32 GB RAM. The module fits into IBM's BladeCenter H and HT chassis supporting advanced virtualization and partitioning features. The JS22 modules can run AIX versions 5.3L and 6 as well as Linux.

At the SuperComputing 2007 (SC07) conference in Reno a new water-cooled p575 was also revealed with 32 POWER6 cores at 4.7 GHz with up to 256 GB of RAM.

[edit] Future

POWER6 includes redundancy-circuitry, support for mainframe instructions, and many power saving features, so there are plans to make stripped down, low power versions for applications like blade systems, and single core versions.^[10] The POWER6L^[11] is a low end derivative of POWER6 in the same segment as PowerPC 970 and there have been rumors of an ultra-light version, POWER6UL. IBM is also investigating a high-end four core version manufactured on a 45 nm process.^[10]

[edit] See also

• IBM POWER
• Power Architecture
• POWER7
• z10, a mainframe processor sharing much technology with the POWER6.

[edit] External links

• Oracle Sets New World Records for 4-Core and 8-Core Performance in Two-Tier SAP® Sales and Distribution Standard Application Benchmark, 24 MAY 2007
• IBM Press Kit
• IBM's Power6 doubles speed
• IBM Unleashes World's Fastest Chip in Powerful New Computer, 21 May 2007
• InformationWeek report on the Power6 announcement
• Real World Tech, Dec 19, 2005
• InformationWeek, Feb 6, 2006
• C|Net, Oct 10, 2006
• Heise Online, Oct 12, 2006
• Real World Tech, Oct 16, 2006
• Arstechnica, Oct 19, 2006
• Arstechnica, Feb 12, 2007
• Arstechnica, May 21, 2007
• The POWER6 microarchitecture, November 2007. IBM.com

[edit] Recommended reading

• POWER Roadmap, IBM, Oct 2006

[edit] References

1. ^ A Mainframe Roadmap. Isham Research. Retrieved on 2005-06-15.
2. ^ ^{a b} IBM grills HP with 4.7GHz Power6-based box. The Register. Retrieved on 2007-05-22.
3. ^ IBM's Power6 Processors to Hit 5.6GHz. The Register. Retrieved on 2006-02-07.
4. ^ IBM's Power6 Gets First Silicon as Power5+ Looms. IT Jungle. Retrieved on 2005-08-22.
5. ^ Roger Howorth (2006-02-08). IBM's Power6 processor to run at 4GHz in 2007. IT Week.
6. ^ ^{a b c} IBM Tips Power6 Processor Architecture. InformationWeek. Retrieved on 2006-02-06.
7. ^ ^{a b c} Fall Processor Forum: Power6 at 5 GHz. Heise online. Retrieved on 2006-10-12.
8. ^ ^{a b} An eCLipz Looms on the Horizon. Real World Technologies. Retrieved on 2005-12-19.
9. ^ IBM cranks dual-core Power6 beyond 4GHz. EETimes. Retrieved on 2006-10-10.
10. ^ ^{a b} IBM's juiced Power6 stomps poor, old Power5+. The Register. Retrieved on 2007-02-16.
11. ^ POWER roadmap, page 5. IBM. Retrieved on 2005-10-27.