Specman

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Specman is an EDA tool, used to automate the verification of hardware designs. It is specifically an environment for working with, compiling, and debugging the 'e' [Hardware Verification Language].

Specman was originally developed at Verisity, an Israeli startup company, which has since been acquired by Cadence.

E is used for functional verification of digital system / integrated circuit design, usually in RTL. Verification engineers implement verification environments using e, the first commercial Aspect-oriented programming language. On March 30, 2006 the IEEE-SA RevCom ratified the draft standard of the p1647 LRM, which means that e is now an IEEE standard.

The e is essentially a Hardware Verification Language (HVL) which unlike HDL, is tailored for implementing efficient and high quality testbench. Main features of e are:
- Object-oriented, which is very suitable for hardware design
- Reusable, especially when the testbench is written following the eVC (e-Verification Component) convention.
- Facilitates random and constrained stimulus generation, which is useful in achieving high functional coverage
- Supports functional coverage metric definition and collection
- Supports assertion for temporal check, which is useful for protocol check
- Scalable, configurable and extendable

To be able to use e testbench for the design, the Specman tool must be linked to HDL logic simulator tool.

Specman has recently become a part of a more comprehensive verification tool called "Incisive", developed by Cadence.

[edit] External links

You can find related articles in

• http://www.thinkverification.com/
• http://www.asic-world.com/specman/
• http://www.specman-verification.com/
• http://www.ieee1647.org/
• Editor Syntax Highlighting Modes
  • Emacs Specman Mode
  • VIM Specman Mode
  • JEdit Specman Mode