Programmed input/output

From Wikipedia, the free encyclopedia

This article does not cite any references or sources. (December 2006)
Please help improve this article by adding citations to reliable sources. Unverifiable material may be challenged and removed.

Programmed input/output (PIO) is a method of transferring data between the CPU and a peripheral such as a network adapter or an ATA storage device.

In general, programmed I/O happens when software running on the CPU directly controls when I/O pins go high or low. Many systems have dedicated hardware to drive I/O pins high and low at the appropriate times without the CPU's direct control. Often software is able to put that hardware in PIO mode, and then use programmed I/O to directly set the I/O pins high or low. The most famous such PIO modes involve the ATA interface.

1 PIO mode in the ATA interface
2 PIO Mode 5
3 Device compatibility
4 See also

[edit] PIO mode in the ATA interface

Until the advent of DMA, PIO was the only method possible.

The PIO interface is grouped into different modes that correspond to different transfer rates. The electrical signaling among the different modes is similar -- only the cycle time between transactions is reduced in order to achieve a higher transfer rate. All ATA devices support the slowest mode -- Mode 0. By accessing the information registers (using Mode 0) on an ATA drive, the CPU is able to determine the maximum transfer rate for the device and configure the ATA controller for optimal performance.

The PIO modes require a great deal of CPU overhead to configure a data transaction and transfer the data. Because of this inefficiency, the DMA (and eventually UDMA) interface was created to increase performance. The simple digital logic required to implement a PIO transfer still makes this transfer method useful today, especially if high transfer rates are not required like in embedded systems, or with FPGA chips where PIO mode can be used without significant performance loss.

Two additional Advanced Timing modes have been defined in the CompactFlash specification 2.0. Those are PIO mode 5 and PIO mode 6. They are specific to CompactFlash.

The modes are given below:

PIO modes
Mode	Maximum transfer rate (MB/s)	Minimum cycle time	Standard where spec is defined
Mode 0	3.3	600 ns	ATA-1
Mode 1	5.2	383 ns	ATA-1
Mode 2	8.3	240 ns	ATA-1
Mode 3	11.1	180 ns	ATA-2
Mode 4	16.7	120 ns	ATA-2
Mode 5	20	100 ns	CompactFlash 2.0
Mode 6	25	80 ns	CompactFlash 2.0

[edit] PIO Mode 5

There was talk about a PIO 5 which would have operated at 22 MB/s, but it was never implemented on hard disks in light of the DMA standard and that CPUs of the time would have been crippled waiting for the hard disk at the proposed PIO 5 timings. While no hard drives were ever manufactured to support this mode, some motherboard manufacturers preemptively provided BIOS support for it. They support it in order to be compatible with CompactFlash cards when they are used with CompactFlash to IDE adapters. However, no hard disk supports those modes as only CompactFlash cards use them.

[edit] Device compatibility

Not all devices are compatible with the official PIO timings. An example is the Sandisk SDDR-89 ImageMate 12-in-1 card reader which uses the GL819 chip from Genesys Logic. That chip has slightly different timings for most of its PIO Modes.