Computer architecture simulator

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In computer science, a computer architecture simulator, or an architectural simulator, is a piece of software to model computer devices (or components) to predict outputs and performance metrics on a given input. An architectural simulator can model a target microprocessor only (see Instruction Set Simulator), or an entire computer system (see Full system simulator) including a processor, a memory system, and I/O devices.

1 Categories
2 Benefits of simulators
3 Implementations
4 See also
5 External links

[edit] Categories

Computer architecture simulators can be classified into many different categories depending on the context.

scope: micro-architecture vs. full-system simulators. The modeled scope could be only one microprocessor or the whole computer system.
Detail: functional s. timing (or performance) simulators. Functional simulators emphasize achieving the same function as the modeled components(What to be done.), while timing simulators strive to accurately reproduce the performance/timing features (When is done.) of the targets in addition to their functionalities.
Input: trace-driven(or event-driven) vs. execution-driven simulators. Traces/Events are pre-recorded streams of instructions with some fixed input. Execution-driven simulators allow dynamic change of instructions to be executed depending on different input data.

[edit] Benefits of simulators

Architectural simulators are very useful for the following purposes:

evaluating different hardware designs without building costly physical hardware systems.
enabling the opportunities to access non-existing computer components or systems
obtaining detailed performance metrics: A single execution of simulators can often generate a large set of performance data.
debugging: Debugging on real hardware typically require re-booting and re-running the code to reproduce the problems. In contrast, some simulators have a fully-controlled environment and allow software developers to run code backward once an error is detected.