Yamaha YM2612

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YM2612, aka OPN2, is a six-channel sound synthesizer IC, or sound chip, produced by Yamaha. It belongs to a family of sound synthesizer chips produced by Yamaha that uses 'FM', or frequency modulation synthesis to generate sounds, and is somewhat similar to the YM3812 (OPL2) and YMF262 (OPL3) FM ICs that were used in the popular AdLib and Creative Labs Sound Blaster soundcards for the PC. It was notably used in the Sega Mega Drive/Sega Genesis game console and various arcade games.

The YM2612 has the following features:

• Six concurrent FM channels (voices)
• Four operators per channel
• Two interval timers
• A low frequency oscillator (LFO)
• Analogue stereo output (most other contemporary Yamaha FM chips require a separate external digital-to-analog converter chip)
• For channel three and six, operator frequencies can be set independently, making dissonant harmonics possible. (Normally, they would have a simple relation like e.g. 1.5x or 2x relative to a common base frequency.)
• Channel six can also be used to play sampled sounds (PCM) instead of FM-based sounds

Each channel may be assigned to either left, right or both (centre) of the stereo output.

The special sixth channel can act as a digital-to-analog converter (DAC) by means of the 'DAC Enable' register, this allows the chip to play 8-bit PCM sound samples. Enabling the DAC disables the FM for that channel. Data is written to the DAC via an 8-bit register. The YM2612 does not provide any timing or buffering of the PCM samples, so all frequency control and buffering must be done in software by the host processor.

The synth patches used by the YM2612 in Mega Drive/Genesis games are compatible with certain members of the Yamaha DX/TX synthesizers, such as the Yamaha DX100.

[edit] Pinout

# Pin Function 1/12 GND Ground Terminals 2-9 D0 - D7 8-bit Bidirectional Data Bus 10 NC Not connected 11 IC System reset, initialize registers, Active Low 13 IRQ Maskable Interrupt, Active Low 14 CS Chip Select, Active Low 15 WR Write mode on data bus, Active Low 16 RD Read mode on data bus, Active Low 17 A0 Read/Write Enable, Active High 18 A1 Part 1 / Part 2 Select (Low = 1, High = 2) 19 A.GND Analog Ground Terminal for internal D/A converter 20-21 MOL, MOR Analog sound outputs, left and right 22 A.Vcc Analog Vcc Terminal for internal D/A converter 23 Vcc +5V Power Terminal 24 øM Master Clock (recommended 7.67 MHz)

CS RD WR A0 A1 State of Data Bus 0 1 0 0 0 Selects Part 1 Register 0 1 0 1 0 Writes data to selected Part 1 Register. 0 0 1 1 0 Reads the status of Part 1. 0 1 0 0 1 Selects Part 2 Register 0 1 0 1 1 Writes data to selected Part 2 Register. 0 0 1 1 1 Reads the status of Part 2. 1 × × × × D0 through D7 become high-impedance.

[edit] See also

• Sound chip
• VGM
• GYM

[edit] References

• Chipdir
• The infamous SEGA2.DOC