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Open NAND Flash Interface Working Group - Wikipedia, the free encyclopedia

Open NAND Flash Interface Working Group

From Wikipedia, the free encyclopedia

The Open NAND Flash Interface Working Group, or ONFI, is a consortium of technology companies working to develop open standards for NAND flash memory chips and devices that communicate with them. The formation of ONFI was announced at the Intel Developer Forum in March 2006.

The group's goals notably do not include the development of a new consumer flash memory card format.[1] Rather, ONFI seeks to standardize the low-level interface to raw NAND flash chips, which are the most widely used form of non-volatile Computer memory integrated circuits today; in 2006, nearly one trillion MiB of flash memory was incorporated into consumer electronics, and production is expected to double in 2007.[2]

Contents

[edit] Motivation

As of 2006, NAND flash memory chips from most vendors use similar packaging, have similar pinouts, and accept similar sets of low-level commands. As a result, when more capable and inexpensive models of NAND flash become available, product designers can incorporate them without major design changes. However, "similar" operation is not optimal:[3] subtle differences in timing and command set mean that products must be thoroughly debugged and tested when a new model of flash chip is used in them.[2] When a product is expected to operate with various NAND flash chips, it must store a table of them in its firmware so that it knows how to deal with differences in their interfaces.[2][3] This increases the complexity and time-to-market of flash-based devices, and means they are likely to be incompatible with future models of NAND flash, unless and until their firmware is updated.

Thus, one of the main motivations for standardization of NAND flash is to make it easier to switch between NAND chips from different producers, thereby permitting faster development of NAND-based products and lower prices via increased competition among manufacturers. As of 2006, NAND flash is increasingly a commodity product,[4] like SDRAM or 3.5" hard disk drives. It is incorporated into many personal computer and consumer electronics products such as USB flash drives, MP3 players, and solid-state drives. Product designers would like 2 GiB and 4 GiB NAND flash chips, for example, to be as easily interchangeable as 60 GiB and 80 GiB 3.5" hard disks from different manufacturers.[4]

[edit] Historical similarities

The effort to standardize NAND flash may be compared to earlier standardization of electronic components. For example, the 7400 series of TTL digital integrated circuits were originally produced by Texas Instruments, but had become a de facto standard family by the late 1970s. These ICs are manufactured as commodity parts by a number of different vendors. This has allowed designers to freely mix 7400 components from different vendors—and even to mix components based on different logic families, once the 74HCT sub-family become available (consisting of CMOS components with TTL-compatible logic levels).

[edit] Members

The ONFI consortium is led by several prominent manufacturers of NAND flash memory:

Samsung, the world's largest manufacturer of NAND flash, is notably absent from the ONFI consortium.[5]

A number of major vendors of NAND flash-based consumer electronics and computing products are also members of ONFI (see External links for the current list of members).

[edit] ONFI standard

ONFI has produced a specification for a standard interface to NAND flash chips. Version 1.0 of this specification was released on December 28, 2006, and is available at no cost from the ONFI web site (see External links). It specifies:

  • a standard physical interface (pinout) for NAND flash in TSOP-48, WSOP-48, LGA-52, and BGA-63 packages
  • a standard mechanism for NAND chips to identify themselves and describe their capabilities (comparable to the Serial Presence Detection feature of SDRAM chips)
  • a standard command set for reading, writing, and erasing NAND flash
  • standard timing requirements for NAND flash
  • improved performance via a standard implementation of read cache and increased concurrency for NAND flash operations
  • improved data integrity by allowing optional ECC memory features

[edit] See also

[edit] External links

News articles:

[edit] References

  1. ^ See ONFI's official Question & Answer page.
  2. ^ a b c See this presentation by Amber Huffman of Intel.
  3. ^ a b See section "The Curse of Similarity" in this white paper by Arun Kamat of Hynix: "Simplifying Flash Controller Design".
  4. ^ a b See this presentation by Amber Huffman and Michael Abraham of Micron.
  5. ^ See this article from The Register's hardware division: "Intel primes Flash standardisation push"


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